1. Field of the Invention
This invention relates to a power semiconductor device, and more particularly to a power semiconductor device having a superjunction structure.
2. Background Art
The ON resistance of a vertical power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) greatly depends on the electric resistance of its conduction layer (drift layer). The dopant concentration that determines the electric resistance of the drift layer cannot exceed a maximum limit, which depends on the breakdown voltage required for a pn junction formed by the base and the drift layer. Thus there is a tradeoff between the device breakdown voltage and the ON resistance. Improving this tradeoff is important for devices with low power consumption. This tradeoff has a limit determined by the device material. Overcoming this limit is the way to realizing devices with low ON resistance beyond existing power devices.
As an example MOSFET for solving this problem, a structure formed by p-pillar layers and n-pillar layers alternately buried in the drift layer is known. This structure is called a superjunction structure. In the superjunction structure, a non-doped layer is artificially produced by equalizing the amount of charge (amount of dopant) contained in the p-pillar layer and the n-pillar layer. Thus, with retaining high breakdown voltage, a current is allowed to flow through the highly doped n-pillar layer, and thereby low ON resistance beyond the material limit can be realized (see e.g. JP 2003-101022A).
As described above, ON resistance is made compatible with the breakdown voltage beyond the material limit by applying the superjunction structure to a vertical power MOSFET. However, for minimizing ON resistance, the amount of dopant in the p-pillar layer and the n-pillar layer needs to be increased as much as possible. For sufficiently depleting the pillar layer having increased dopant concentration, the arrangement period of p-pillar layers and n-pillar layers of the superjunction structure (hereinafter also referred to as “horizontal period”) needs to be decreased. More specifically, if the amount of dopant in the p-pillar layer and the n-pillar layer is increased without decreasing the horizontal period, the horizontal electric field required for completely depleting the superjunction structure increases, and the vertical electric field determining the breakdown voltage decreases. Thus the breakdown voltage decreases together with ON resistance. Therefore it is indispensable to decrease the horizontal period of the superjunction structure for reducing ON resistance with maintaining high breakdown voltage.
When the horizontal period of the superjunction structure is decreased, the horizontal period of the MOS gate structure formed on the surface must be also decreased. This is because the MOS gate structure without similar downscaling causes a mismatch with the superjunction structure. However, downscaling the MOS gate structure is difficult, because it involves significant process changes and decreased process margin.